Design & Reuse
287 IP
251
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DDR5/4 PHY for Samsung 7LPP
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 ...
252
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DDR5/4/LPDDR5/4X PHY for TSMC for N5P
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
253
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DDR5/DDR4/LPDDR5 Combo PHY IP - 4800Mbps (Silicon Proven in TSMC 12FFC)
The DDR PHY IP supports DDR5/ DDR4/ LPDDR5, provides low latency, and enables up to 5400MT/s throughput. PHY functionality is verified in NC-Verilog s...
254
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High Performance DDR 3/2 Memory Controller IP
This memory controller supports DDR2/3 SDRAM. DDR2/3 memory controller is a high-speed interface used for data read/write between internal engine and ...
255
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Up to 50% main memory bandwidth acceleration
The Ziptilion Bandwidth IP accelertes the main memory bandwidth with up to 50%. The IP core packages a novel and proprietary technology that accelerat...
256
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LPDDR Controller for LPDDR5X, LPDDR5 and LPDDR4X
Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...
257
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LPDDR Controller IP
LPDDR is full-featured, easy-to-use, synthesizable design, compatible with JESD209A-1 and JESD209B specification. Through its LPDDR compatibility, it ...
258
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LPDDR2 Controller IP
LPDDR2 interface provides full support for the LPDDR2 interface, compatible with JESD209-2E and JESD209-2F specification. Through its LPDDR2 compatibi...
259
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LPDDR3 Controller IP
LPDDR3 interface provides full support for the LPDDR3 interface, compatible with JESD209-3,JESD209-3B and JESD209-3C specification. Through its LPDDR3...
260
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LPDDR4 Controller IP
LPDDR4 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR4 JESD209-4, JESD209-4A, JESD209-4B, JESD209-4C, JESD209-4X and JESD2...
261
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LPDDR4 multiPHY V2 in UMC (28nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
262
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LPDDR4/ DDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
263
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LPDDR4X / LPDDR4 Controller
The Rambus LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile, Internet of ...
264
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LPDDR4X/4/3/DDR4 PHY for TSMC 12nm and 16nm
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
265
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LPDDR4X/4/3/DDR4/3/3L PHY + Controller
INNOSILICON™ LPDDR4X/4/3/DDR4/3/3L Combo IP is a customizable Mixed-Signal DDR memory interface suite. The Combo IP provides turnkey physical interfac...
266
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LPDDR5 Controller IP
LPDDR5 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5 JESD209-5 and JESD209-5A specification and DFI-version 5.0 specific...
267
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LPDDR5/4/4X Controller with Inline Memory Encryption (IME) Security Module
SynopsysLPDDR5/4/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5, LP...
268
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LPDDR5/4X COMBO PHY 7nm/6nm
The LPDDR5 and LPDDR4x Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected with a third-party DFI...
269
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LPDDR5/4X PHY IP for TSMC N7
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
270
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LPDDR5/4x/4 PHY IP for Samsung 14LPU
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
271
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LPDDR5/5X Memory PHY for TSMC N3P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
272
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LPDDR5/5X Memory PHY for TSMC N4P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
273
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LPDDR5/5X Memory PHY for TSMC N5P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
274
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LPDDR5X 7nm/6nm PHY
The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...
275
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LPDDR5X Controller IP
LPDDR5X is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5X draft JEDEC specification and DFI-version 5.0 specification Compl...
276
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LPDDR5X PHY 3nm
The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...
277
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LPDDR5X PHY 5nm/4nm
The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...
278
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LPDDR5x/5 Driver SDK Starter Kit
The MOUNT MUIR LPDDR5x (MM-LPDDR5x) solution is a comprehensive SDK that enables users to easily implement functions and interface with LPDDR5X Memory...
279
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LPDDR5x/5 IP Subystem (Processing Engine+Memory Controller+PHY+VIP+TestCases)
MEMTECH’ LPDDR5X (Low Power DDR5X) complete IP Subsystem is optimized to accelerate LPDDR5x IP subsystem development, minimize the subsystem integrati...
280
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LPDDR5x/5 Synthesizable Verification IP
MEMTECH’ GT LPDDR5x/5 VIP is optimized for fast debug & system validation to help you reach highest memory performance resulting in lower time to trai...
281
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LPDDR5x/5 SystemC TLM Cycle Accurate Model
MEMTECH’ Mount Stanford-L series LPDDR5x Memory Controller SystemC Model can support customers with high-performance simulation model needs. This stan...
282
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LPDDR5X/5/4X COMBO PHY
The LPDDR5x, LPDDR5, and LPDDR4x Combo PHY is designed for seamless integration into any System-on-Chip (SoC) and can easily connect to a third-party ...
283
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LPDDR5X/5/4X Controller with Inline Memory Encryption (IME) Security Module
Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...
284
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LPDDR6, LPDDR5X Combo PHY & Controller
...
285
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MRDIMM DDR5 & DDR5/4 PHY & Controller
INNOSILICON™ DDR5 IP includes the MRDIMM DDR5 PHY and DDR5/4 Combo PHY and corresponding controllers for ICs requiring access to JEDEC compatible SDRA...
286
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TSMC CLN7FF 7nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
287
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TSMC DDR3/4 & LPDDR3/4/4x Combo IP with Controller + PHY
This combo IP solution supports DDR3/DDR4 and LPDDR3/LPDDR4/LPDDR4x memory standards, designed for high performance and low power applications on TSMC...